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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gafb7b3b467a12177fb0c8053f4b7d70a1"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gafb7b3b467a12177fb0c8053f4b7d70a1">XDpTxSs_CfgInitialize</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, <a class="el" href="struct_x_dp_tx_ss___config.html">XDpTxSs_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:gafb7b3b467a12177fb0c8053f4b7d70a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the DisplayPort Transmitter Subsystem core.  <a href="group__dptxss.html#gafb7b3b467a12177fb0c8053f4b7d70a1">More...</a><br/></td></tr>
<tr class="separator:gafb7b3b467a12177fb0c8053f4b7d70a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d3af2f5793e806f2e63a39d1055568c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga2d3af2f5793e806f2e63a39d1055568c">XDpTxSs_Reset</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga2d3af2f5793e806f2e63a39d1055568c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets the DisplayPort Transmitter Subsystem including all sub-cores.  <a href="group__dptxss.html#ga2d3af2f5793e806f2e63a39d1055568c">More...</a><br/></td></tr>
<tr class="separator:ga2d3af2f5793e806f2e63a39d1055568c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga883ba3d77b48aaaee5858de1e5620c76"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga883ba3d77b48aaaee5858de1e5620c76">XDpTxSs_Start</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga883ba3d77b48aaaee5858de1e5620c76"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function starts the DisplayPort Transmitter Subsystem including all sub-cores.  <a href="group__dptxss.html#ga883ba3d77b48aaaee5858de1e5620c76">More...</a><br/></td></tr>
<tr class="separator:ga883ba3d77b48aaaee5858de1e5620c76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51a71c98f5346be40c4c76e091e121f8"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga51a71c98f5346be40c4c76e091e121f8">XDpTxSs_StartCustomMsa</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, <a class="el" href="group__dptxss.html#gaa1430b8060c5df2fd8c8e664247143f8">XDpTxSs_MainStreamAttributes</a> *MsaConfigCustom)</td></tr>
<tr class="memdesc:ga51a71c98f5346be40c4c76e091e121f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function starts the DisplayPort Transmitter Subsystem with custom multi-stream attributes (MSA)including all sub-cores.  <a href="group__dptxss.html#ga51a71c98f5346be40c4c76e091e121f8">More...</a><br/></td></tr>
<tr class="separator:ga51a71c98f5346be40c4c76e091e121f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf70f2f11d0e48e80c92673f3e208fc23"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gaf70f2f11d0e48e80c92673f3e208fc23">XDpTxSs_Stop</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaf70f2f11d0e48e80c92673f3e208fc23"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the DisplayPort Transmitter Subsystem sub-cores.  <a href="group__dptxss.html#gaf70f2f11d0e48e80c92673f3e208fc23">More...</a><br/></td></tr>
<tr class="separator:gaf70f2f11d0e48e80c92673f3e208fc23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77e0e444121e167b215442fd9f941ea0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga77e0e444121e167b215442fd9f941ea0">XDpTxSs_VtcAdjustBSTimingEnable</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga77e0e444121e167b215442fd9f941ea0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables special timing mode for BS equal timing.  <a href="group__dptxss.html#ga77e0e444121e167b215442fd9f941ea0">More...</a><br/></td></tr>
<tr class="separator:ga77e0e444121e167b215442fd9f941ea0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b650b6b1316984487bcbc9b6bbb26a1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga4b650b6b1316984487bcbc9b6bbb26a1">XDpTxSs_VtcAdjustBSTimingDisable</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga4b650b6b1316984487bcbc9b6bbb26a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables special timing mode for BS equal timing.  <a href="group__dptxss.html#ga4b650b6b1316984487bcbc9b6bbb26a1">More...</a><br/></td></tr>
<tr class="separator:ga4b650b6b1316984487bcbc9b6bbb26a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8edde5017977263b22afd3abb4ad6a10"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga8edde5017977263b22afd3abb4ad6a10">XDpTxSs_SetBpc</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 Bpc)</td></tr>
<tr class="memdesc:ga8edde5017977263b22afd3abb4ad6a10"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the bits per color value of the video stream.  <a href="group__dptxss.html#ga8edde5017977263b22afd3abb4ad6a10">More...</a><br/></td></tr>
<tr class="separator:ga8edde5017977263b22afd3abb4ad6a10"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac94df5d299e1a088c159a2be61840680"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gac94df5d299e1a088c159a2be61840680">XDpTxSs_SetVidMode</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, XVidC_VideoMode VidMode)</td></tr>
<tr class="memdesc:gac94df5d299e1a088c159a2be61840680"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the standard display mode.  <a href="group__dptxss.html#gac94df5d299e1a088c159a2be61840680">More...</a><br/></td></tr>
<tr class="separator:gac94df5d299e1a088c159a2be61840680"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac4d355f49181b25350d705601844836e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gac4d355f49181b25350d705601844836e">XDpTxSs_OverrideSyncPolarity</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 Stream)</td></tr>
<tr class="memdesc:gac4d355f49181b25350d705601844836e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function overrides the Horizontal and Vertical Sync signals.  <a href="group__dptxss.html#gac4d355f49181b25350d705601844836e">More...</a><br/></td></tr>
<tr class="separator:gac4d355f49181b25350d705601844836e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6525a2e8e00c2f836e500241e0d45a6f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga6525a2e8e00c2f836e500241e0d45a6f">XDpTxSs_SetLinkRate</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 LinkRate)</td></tr>
<tr class="memdesc:ga6525a2e8e00c2f836e500241e0d45a6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the data rate to be used by the DisplayPort TX Subsystem core.  <a href="group__dptxss.html#ga6525a2e8e00c2f836e500241e0d45a6f">More...</a><br/></td></tr>
<tr class="separator:ga6525a2e8e00c2f836e500241e0d45a6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47d0bbf83c92e4f29846002480bf57b0"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga47d0bbf83c92e4f29846002480bf57b0">XDpTxSs_SetLaneCount</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 LaneCount)</td></tr>
<tr class="memdesc:ga47d0bbf83c92e4f29846002480bf57b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the number of lanes to be used by DisplayPort TX Subsystem core.  <a href="group__dptxss.html#ga47d0bbf83c92e4f29846002480bf57b0">More...</a><br/></td></tr>
<tr class="separator:ga47d0bbf83c92e4f29846002480bf57b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba3d0d5532d6ad4e89b9f58ae215a4d1"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gaba3d0d5532d6ad4e89b9f58ae215a4d1">XDpTxSs_SetTransportMode</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 Mode)</td></tr>
<tr class="memdesc:gaba3d0d5532d6ad4e89b9f58ae215a4d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets transport mode (SST/MST).  <a href="group__dptxss.html#gaba3d0d5532d6ad4e89b9f58ae215a4d1">More...</a><br/></td></tr>
<tr class="separator:gaba3d0d5532d6ad4e89b9f58ae215a4d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a8026694798f9f8b6c8e43fcccd15ec"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga1a8026694798f9f8b6c8e43fcccd15ec">XDpTxSs_GetRxCapabilities</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga1a8026694798f9f8b6c8e43fcccd15ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves the RX device's capabilities from the RX device's DisplayPort Configuration Data (DPCD).  <a href="group__dptxss.html#ga1a8026694798f9f8b6c8e43fcccd15ec">More...</a><br/></td></tr>
<tr class="separator:ga1a8026694798f9f8b6c8e43fcccd15ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga67a126cda8e59ab3a9622bc2ba2e900d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga67a126cda8e59ab3a9622bc2ba2e900d">XDpTxSs_GetEdid</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 *Edid)</td></tr>
<tr class="memdesc:ga67a126cda8e59ab3a9622bc2ba2e900d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves an immediately connected RX device's Extended Display Identification Data (EDID) structure.  <a href="group__dptxss.html#ga67a126cda8e59ab3a9622bc2ba2e900d">More...</a><br/></td></tr>
<tr class="separator:ga67a126cda8e59ab3a9622bc2ba2e900d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga882a24d1900a5530bac270beca25d173"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga882a24d1900a5530bac270beca25d173">XDpTxSs_GetRemoteEdid</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 SinkNum, u8 *Edid)</td></tr>
<tr class="memdesc:ga882a24d1900a5530bac270beca25d173"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function retrieves a remote RX device's Extended Display Identification Data (EDID) structure.  <a href="group__dptxss.html#ga882a24d1900a5530bac270beca25d173">More...</a><br/></td></tr>
<tr class="separator:ga882a24d1900a5530bac270beca25d173"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84de784579ceabd123fdf1136dde0c7d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga84de784579ceabd123fdf1136dde0c7d">XDpTxSs_IsConnected</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga84de784579ceabd123fdf1136dde0c7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if there is a connected RX device to DisplayPort TX Subsystem.  <a href="group__dptxss.html#ga84de784579ceabd123fdf1136dde0c7d">More...</a><br/></td></tr>
<tr class="separator:ga84de784579ceabd123fdf1136dde0c7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga50fc785403847b8c3932a2213553e28d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga50fc785403847b8c3932a2213553e28d">XDpTxSs_CheckLinkStatus</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga50fc785403847b8c3932a2213553e28d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if the receiver's DisplayPort Configuration Data (DPCD) indicates the receiver has achieved and maintained clock recovery, channel equalization, symbol lock, and interlane alignment for all lanes currently in use.  <a href="group__dptxss.html#ga50fc785403847b8c3932a2213553e28d">More...</a><br/></td></tr>
<tr class="separator:ga50fc785403847b8c3932a2213553e28d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5ce68495e3cc42e29d65322f4fa0976"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#gac5ce68495e3cc42e29d65322f4fa0976">XDpTxSs_SetUserPixelWidth</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 UserPixelWidth, u8 StreamId)</td></tr>
<tr class="memdesc:gac5ce68495e3cc42e29d65322f4fa0976"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function configures the number of pixels output through the user data interface.  <a href="group__dptxss.html#gac5ce68495e3cc42e29d65322f4fa0976">More...</a><br/></td></tr>
<tr class="separator:gac5ce68495e3cc42e29d65322f4fa0976"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86f60203836c66b3c3fa87c7dce3d2b3"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga86f60203836c66b3c3fa87c7dce3d2b3">XDpTxSs_GetNumOfMstStreams</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga86f60203836c66b3c3fa87c7dce3d2b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns number of downstream MST sink devices enumerated and available for payload allocation .  <a href="group__dptxss.html#ga86f60203836c66b3c3fa87c7dce3d2b3">More...</a><br/></td></tr>
<tr class="separator:ga86f60203836c66b3c3fa87c7dce3d2b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00e2cce4e9b8511ed14e9f9a30790175"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga00e2cce4e9b8511ed14e9f9a30790175">XDpTxSs_IsMstCapable</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga00e2cce4e9b8511ed14e9f9a30790175"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function determines whether downstream RX device is MST/SST capable.  <a href="group__dptxss.html#ga00e2cce4e9b8511ed14e9f9a30790175">More...</a><br/></td></tr>
<tr class="separator:ga00e2cce4e9b8511ed14e9f9a30790175"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e195acb70afeb93d39f9e487e137356"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dptxss.html#ga1e195acb70afeb93d39f9e487e137356">XDpTxSs_SetHasRedriverInPath</a> (<a class="el" href="struct_x_dp_tx_ss.html">XDpTxSs</a> *InstancePtr, u8 Set)</td></tr>
<tr class="memdesc:ga1e195acb70afeb93d39f9e487e137356"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets software switch that specify whether or not a redriver exits on the DisplayPort output path.  <a href="group__dptxss.html#ga1e195acb70afeb93d39f9e487e137356">More...</a><br/></td></tr>
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